1. Field of the Invention
The present invention relates to the field of semiconductor devices, and more particularly, to a semiconductor device having trench structures and a method for fabricating the same.
2. Description of the Prior Art
Double-diffused metal-oxide-semiconductor (DMOS) transistor devices can be classified into two categories; the first one comprises the lateral double-diffused MOS transistors and the second one comprises the vertical double-diffused MOS transistors. Thanks to the advantages of having a high operational bandwidth and a high operational efficiency, the DMOS transistor devices are widely used in high operational voltage environments, such as CPU power supplies, power management systems, AC/DC converters, and high-power or high frequency (HF) band power amplifiers.
Generally, each LDMOS transistor includes a substrate having a first conductivity type, such as P-type; a pair of source and drain regions having a second conductivity type, such as N-type, being disposed in the substrate, wherein the source is embedded in a P-type well; and a gate structure disposed on a part of a field oxide layer. When the transistor is switched on, the current can flow from the source or the drain side to the other side through a lateral diffused area which has a low dopant concentration and a large area. As a result, this lateral diffused area can buffer the high voltage signals between the source region and the drain region and improve the breakdown voltage (Vbd) of the transistor.
With the trend of miniaturization of the electronic products, the conventional LDMOS transistors have already reached their limits, due to the relatively large cell pitch in the transistor. Therefore, how to reduce the occupied area of DMOS transistor devices in a semiconductor substrate without adversely affecting their performance is an important issue in this field.